1. Field of the Invention
This invention relates generally to monitoring and testing computers and more particularly, to methods and apparatus for externally monitoring tests that are running internally on a personal computer.
2. Description of the Related Art
FIG. 1 illustrates a prior art, passive monitoring system 8 for monitoring an internal test on a personal computer (PC) 10. The PC 10 is located at a remote test site 12 which may be, for example, a site on an assembly line or conveyor system 14. The first ends of three conducting wires 16 connect to individual parallel port pins 18 of the PC 10. A second end of each of the conducting wires 16 connects to a connector 20 located at an external monitoring station 22. The connector 20 holds red 24, yellow 26, and green 28 light emitting diodes (LED's). Logic+1 signals from the parallel port pins 18 have a voltage sufficient to activate the LED's 24, 26, and 28. The LED's 24, 26, and 28 are within viewing distance of and monitored by a remote operator 30. The remote operator 30 may be a human or an automated device (not shown).
While the test is being run, a terminate and stay resident (“TSR”) program encoded on a portable program storage medium 32 is loaded in a memory 34 of the remote PC 10. The TSR program periodically activates and reads status data from the memory 34. One or more status addresses 36, in the memory 34, contain the status data on an internal test. The TSR program periodically writes logic signals to the parallel port pins 18 to indicate the test's progress.
The logic signals written to the pins 18 by the internal TSR program power the LED's 24, 26, and 28. In one arrangement, the red LED 24 is lighted when the test has been failed, the yellow LED 26 is lighted while the test is proceeding, and the green LED 28 is lighted when the test has been passed successfully. By observing the LED's 24, 26, and 28, the operator 30 of the assembly line or conveyor system 14 can follow the progress of the test on the remote PC 10 and take appropriate actions. These actions may include sending the PC 10 to a repair or scrap area 38 when the red LED 24 is lighted, sending the PC 10 to the next station 40 on the assembly line or conveyor system 14 when the green LED 28 is lighted, and waiting while the yellow LED 26 is lighted.
The passive monitoring system 8 may fail due to malfunctions of the remote PC 10. In the remote PC 10, a “hard lock” malfunction can block a bus (not shown) thereby either blocking writes to the status addresses 36 or blocking signals at the parallel port pins 18 in a fixed configuration. If hard lock occurs, the signals from the LED's 24, 26, and 28 may not correspond to the actual test status of the remote PC 10. For example, suppose that the logic signals at the parallel port pins 18 were lighting the yellow LED 26 when a hard lock first occurred. In a hard lock, an internal bus serving the parallel port pins 18 may be blocked thereby making the output a continuous and non-alternating signal. Thus, in hard lock, the yellow LED 26 may continue being lighted and mislead the remote operator 30 into believing that the test is still proceeding normally. Since the remote operator 30 is not aware of the malfunction, he will wait instead of sending the PC 10 to the repair or scrap area 38. This wait will slow or stop the processing of other PC's (not shown) by the assembly line or conveyor system 14.
FIG. 2 illustrates a prior art monitoring device 42 disclosed in U.S. Pat. No. 5,630,048 ('048). In the monitoring device 42, an interface 44 connects an internal data bus 46 of the monitoring device 42 to an internal bus 50 of a remote computer (not shown). The input latches 52 connect a controller 54 to the data bus 46 of the monitoring device 42. Signals go from the latches 52 to a filter circuit 56. An output of the filter circuit 56 goes to an analyzer buffer 58 and a writable memory (not shown). A trigger control 60 also receives signals from the latches 52. An address register 62 for data of the analyzer buffer 58 is also connected to the trigger control 60. The analyzer buffer 58 and trigger control 60 connect through a controller bus 64 to a central processing unit (not shown).
The monitoring device 42 of FIG. 2 passively receives data or control signals that appear on the internal bus 50 of the remote computer. The latches 52 receive signals at the sending rate of the internal bus 50 of the remote computer. Then, the received signals follow two paths. The first path leads to the trigger control 60 which compares the received signals with signal signature patterns stored in a library file (not shown). By comparing the received signals to the signal signature patterns, the trigger controller 60 can identify certain types of transactions on the internal bus 50 of the remote computer. Along the second path, the signals pass through the filter circuit 56 which reduces the signal for storage in the analyzer buffer 58. Data from the trigger controller 60 and the reduced signal portions from the analyzer buffer 58 are preferably written to correlated memory addresses. The stored signal portions and data from the trigger control 60, may be used for subsequent analysis of the performance of the remote computer.
The '048 monitoring device collects real-time operations data that may be used subsequently to perform a detailed analysis of the remote computer. In a manufacturing context, it is preferable to not only collect data in real-time, but also analyze the data in real-time to obtain an immediate analysis of the operation of the remote computer with respect to simple pass/fail criteria. Pass/fail tests are usually more rapid when the remote computer performs the test internally and supplies test results that do not require further analysis by the monitoring device. In an assembly line, it is preferable that the monitoring device obtain test results as opposed to operations data from the remote computer and that the monitoring device not make an independent analysis of the real-time operations of the remote computer.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.